A CONDUCTIVE CHANNEL PSEUDO BLOCK PROCESS AND CIRCUIT TO INHIBIT REVERSE ENGINEERING

Details for Australian Patent Application No. 2003278917 (hide)

Owner HRL LABORATORIES, LLC

Inventors CHOW, Lap-Wai; CLARK, William, M. , Jr.; HARBISON, Gavin, J.; BAUKUS, James, P.

Pub. Number AU-A-2003278917

PCT Number PCT/US03/30212

PCT Pub. Number WO2004/030097

Priority 60/414,216 27.09.02 US; 10/635,790 05.08.03 US

Filing date 23 September 2003

Wipo publication date 19 April 2004

International Classifications

H01L 023/58 Details of semiconductor or other solid state devices - Structural electrical arrangements for semiconductor devices not otherwise provided for

G11C 007/24 Arrangements for writing information into, or reading information out from, a digital store

G06K 019/073 Record carriers for use with machines and with at least a part designed to carry digital markings - Special arrangements for circuits, e.g. for protecting identification code in memory

H01L 021/285 Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof

Event Publications

26 February 2004 Complete Application Filed

  Priority application(s): 60/414,216 27.09.02 US; 10/635,790 05.08.03 US

20 May 2004 Application Open to Public Inspection

  Published as AU-A-2003278917

14 July 2005 Application Lapsed, Refused Or Withdrawn, Patent Ceased or Expired

  This application lapsed under section 142(2)(f)/See Reg. 8.3(3). Examination has not yet been requested or directed for this application. Note that applications or patents shown as lapsed or ceased may be restored at a later date.

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