MULTILEVEL POLY-SI TILING FOR SEMICONDUCTOR CIRCUIT MANUFACTURE

Details for Australian Patent Application No. 2002341318 (hide)

Owner KONINKLIJKE PHILIPS ELECTRONICS N.V.

Inventors HENDRIKS, Antonius, M., P., J.; DORMANS, Guido, J., M.; VERHAAR, Robertus, D., J.

Pub. Number AU-A-2002341318

PCT Number PCT/IB02/04357

PCT Pub. Number WO2003/034485

Priority 01203942.6 16.10.01 EP

Filing date 16 October 2002

Wipo publication date 28 April 2003

International Classifications

H01L 021/822 Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof

H01L 027/02 Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate - including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier

Event Publications

27 February 2003 Complete Application Filed

  Priority application(s): 01203942.6 16.10.01 EP

3 July 2003 Application Open to Public Inspection

  Published as AU-A-2002341318

1 July 2004 Application Lapsed, Refused Or Withdrawn, Patent Ceased or Expired

  This application lapsed under section 142(2)(f)/See Reg. 8.3(3). Examination has not yet been requested or directed for this application. Note that applications or patents shown as lapsed or ceased may be restored at a later date.

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